(untitled) (International Journal of Communication Systems and Network Technologies, 2020)
As the technology scales down, the interconnect structures become a predominant factor in determining the overall circuit parameters like performance, reliability and cost. Coupling capacitances and interconnect delay plays an important role in deciding the behaviour of on-chip interconnects. The paper reviews various interconnect delay models and techniques adopted by different researchers to avoid crosstalk in VLSI interconnect. It has been observed that distributed RLC interconnect delay model have applications in computer-aided design for rapid time analysis, global wire sizing and estimating switching activity even at high frequencies.