Testing of a SoC with a Pre-tested and Pre-verified Silicon
DOI:
https://doi.org/10.18486/ijcsnt/2.2.024Keywords:
ATE, SoC Production Testing, Delay Measurement, I/O AC Timing Testing, Testing of I/O Interfaces, SoC Testing, Loopback Test, Serdes Testing, RF TestingAbstract
Due to increase in SoC complexity, the cost of production testing on automated testing equipment (ATE) is increasing, which directly impact the gross margin and viability of any SoC. These pushes SoC maker to look for an alternative method of testing. This paper proposes an alternate scheme for production testing whereby major part (I/O AC specification testing, functional testing, loopback of Serializer/De-serializer (SERDES) testing, frequency testing, Built-In-Self-Test (BIST) etc) of the SoC testing except wafer testing (stuck-at fault, AC scan testing, DC) can be done with a pre-tested and pre-verified custom made SoC. It will help, to minimize the dependencies of Automatic Test Equipment (ATE) for SoC testing on production significantly. Hence production testing cost per device will be reduced. Also this scheme will enable to test many of the functional features of SoC on silicon, which were not possible to test using ATE due to high test cost. In this paper the micro architectural details of the scheme, system requirements, design challenges and case study conducted on different SoCs are presented.
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