Processing of Multiple Digital Signals Based on Real-time Walsh Transform

Authors

DOI:

https://doi.org/10.18486/ijcsnt/1.2.009

Keywords:

Fast Hadamard Transform, Real-time Walsh Transform, Walsh Transform, Real-time Inverse Walsh Transform, Inverse Walsh Transform, Walsh Functions, Walsh Series, Walsh Coefficients, Rademacher Functions, Dyadic Convolution

Abstract

In this paper, the design and implementation of processing of multiple digital signals using real-time Walsh transforms is presented. The design of real-time Walsh is able to produce output instantly even before all input data have been given to the system. The design system consists of Walsh Transforms, some Digital Signal Processing (DSP) circuits, and inverse Walsh transform. The realtime Walsh and inverse Walsh transforms are also designed to produce right results for all possible combinations of input data. DSP block is designed to perform addition, subtraction, and dyadic convolution process of Walsh coefficients of two or more digital signals. Comparisons to the previous methods are presented in details. It was found that the design of real-time Walsh transform structure performs better than many of the reported results in the literature.

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Published

2012-08-30

How to Cite

Processing of Multiple Digital Signals Based on Real-time Walsh Transform. (2012). International Journal of Communication Systems and Network Technologies, 1(2), 101-115. https://doi.org/10.18486/ijcsnt/1.2.009